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DSS™ Clock Synchronisation


Synchronisation for real-time playback is a key need in modern networked entertainment systems as digital data transmitted asynchronously (or as packets) over a network needs to be re synchronised to it's sampling rate for playback. Due to the multiplicity of existing digital audio sampling rates (8, 11.025, 22.05, 24, 32, 44.1, 48, 88.2, 96, 176.4, 192kHz) clock recovery systems must be used with the capabilities to support all these rates. However they are usually implemented using complex hardware PLLs which need to be of high quality if no degradation of audio quality is expected. Moreover, this approach results in complicated multiple clock designs (network clock, local CPU or DSP clock, audio playback clock) which may alter sound quality through clock inter modulation and have a significant cost. All the more, if new sampling rates appear, hardware modifications are needed. Our DSS™ Synchronisation technology provides an elegant and very cost-effective alternative for removing these multiple clocks and resulting in a full synchronous design. In addition, our software based approach can support new sampling rates and formats which consequently does not require any change in hardware.

Jitter Reduction

Jitter is one of the worst quality degrading factors in digital audio playback (or recording) system. Jitter is a variation in the clock period around a central period value. It can be considered as noise on the audio clock. It is capital in order to get a good Digital to Analog (playback) or Analog to Digital (recording) conversion, that jitter be minimized.

Digital audio is often conveyed from one unit to the other using an SPDIF or AES/EBU link. These links use bi-phase modulation to convey both data and clocks in a single data stream. At the receiving end, a digital audio receiver (which is basically a PLL) locks to the incoming data stream and extracts clocks and audio data into separate physical lines. Of course, if the transmission is of poor quality, jitter will be introduced. The receiver will do its best to lock the PLL to the incoming stream but depending on the amount of jitter present, there will still be some jitter at the output of the digital audio receiver, which will be of bad influence on audio quality.

This problem may be overcome be the use of a sample rate converter. Instead of relying on the incoming data stream to get precise (e.g. low jitter) clocks, we use a local high precision clock generator and use a sample rate converter to convert from the incoming sampling rate to the local rate given by the precision clock. The following figure illustrates this use of a sample rate converter in the case of a high-end digital to analog converter.


At a Glance

Features

Benefits

Elegant re-clocking solution based around a single crystal oscillator. Suitable for any audio application that requires high quality resynchronisation. Single crystal clock. Reduces required clock domains and lowers system complexity.
Software based solution. New sample rates do not require hardware modifications.
Fully synchronous design. Improves jitter rejection at conversion between digital and analog domains.
Combines seamlessly with Q5™ Upsampling. Delivers outstanding digital to analog conversion performance.

DSS™ Synchronisation White Paper

ANAGRAM DSS White Paper PDF Download - 694KB

In this paper we explain ANAGRAM’s DSS™ Synchronisation technology and show how its application to high-performance digital audio systems with integrated digital to analog converters provides best-in-class performance while reducing system cost. We first give a reminder on jitter and synchronisation when applied to digital to analog conversion and then introduce the DSS™ Synchronisation technology and its application for the considered case.